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| 1.8cm (0.7-inch) ntsc/pal/wid color lcd panel description the LCX018AK is a 1.8cm diagonal active matrix tft-lcd panel addressed by the polycrystalline silicon super thin film transistors with built-in peripheral driving circuit. this panel provides full- color representation in ntsc/pal/wid mode. rgb dots are arranged in a delta pattern featuring high picture quality of no fixed color patterns, which is inherent in vertical stripes and mosaic pattern arrangements. features number of active dots: 240,000 (0.7-inch; 1.8cm in diagonal) horizontal resolution: 400 tv lines high optical transmittance: 4.4% (typ.) high contrast ratio with normally white mode: 200 (typ.) built-in h and v driving circuit (built-in input level conversion circuit, ttl drive possible) high quality picture representation with rgb delta arranged color filters full-color representation ntsc/pal/wid compatible up/down and/or right/left inverse display function side-black function 16:9 and 4:3 aspect switching function element structure dots 16:9 display: 1068.5 (h) 225 (v) = 240,412 4:3 display: 803.5 (h) 225 (v) = 180,787 built-in peripheral driving circuit using the polycrystalline silicon super thin film transistors. ?1 e98521-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. LCX018AK
? 2 LCX018AK block diagram h s h i f t r e g i s t e r ( b i d i r e c t i o n a l s c a n n i n g ) i n p u t s i g n a l l e v e l s h i f t e r u p / d o w n a n d / o r r i g h t / l e f t i n v e r s i o n 4 : 3 / 1 6 : 9 c o n t r o l c i r c u i t v s h i f t r e g i s t e r ( b i d i r e c t i o n a l s c a n n i n g ) s i d e - b l a c k c o n t r o l c i r c u i t p s i g h s t h c k 1 h c k 2 w i d r g t v s t v c k 1 h v d d v v d d v s s s i g 1 s i g 2 s i g 3 c o m c o m p a d p c g d w n e n v c k 2 1 2 2 9 1 0 7 8 1 6 1 4 1 5 1 8 1 7 1 3 6 1 9 3 4 5 1 1 1 v s h i f t r e g i s t e r ( b i d i r e c t i o n a l s c a n n i n g ) ? 3 LCX018AK absolute maximum ratings (vss = 0v) h driver supply voltage hv dd ?.0 to +17 v v driver supply voltage vv dd ?.0 to +17 v h driver input pin voltage hst, hck1, hck2 ?.0 to +17 v rgt v driver input pin voltage vst, vck1, vck2 ?.0 to +17 v clr, en video signal input pin voltage green, red, blue ?.0 to +15 v operating temperature topr ?0 to +70 c storage temperature tstg ?0 to +85 c operating conditions (vss = 0v) ? supply voltage hv dd 13.5 0.5 v vv dd 13.5 0.5 v ? input pulse voltage (vp-p of all input pins except video signal input pins) vin 3.0v or more pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 com psig sig1 sig2 sig3 hv dd wid rgt hst hck1 hck2 v ss en vck2 vck1 vst dwn pcg vv dd sout common voltage of panel improvement signal for uniformity video signal (green) to panel video signal (red) to panel video signal (blue) to panel power supply for h driver aspect-ratio switching (h: 16:9, l: 4:3) drive direction pulse for h shift register (h: normal, l: reverse) start pulse for h shift register drive clock pulse for h shift register drive clock pulse for h shift register drive gnd (h, v drivers) enable pulse for gate selection clock pulse for v shift register drive clock pulse for v shift register drive start pulse for v shift register drive drive direction pulse for v shift register (h: normal, l: reverse) improvement pulse for uniformity power supply for v driver h, v shift register drive confirmation symbol description ? 4 LCX018AK input equivalent circuit to prevent static charges, protective diodes are provided for each pin except the power supply. in addition, protective resistors are added to all pins except video signal input. the equivalent circuit of each input pin is shown below. (the resistor value: typ.) v v d d 2 5 0 w 2 5 0 w 2 5 0 w 2 5 0 w l e v e l c o n v e r s i o n c i r c u i t ( 2 - p h a s e i n p u t ) h c k 1 h c k 2 1 m w 1 m w 2 . 5 k w 2 . 5 k w h v d d i n p u t l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 5 0 w 2 5 0 w h v d d i n p u t i n p u t h v d d f r o m h d r i v e r s i g n a l l i n e ( 1 ) s i g 1 , s i g 2 , s i g 3 , s i d ( 2 ) h c k 1 , h c k 2 ( 3 ) h s t ( 4 ) r g t , w i d ( 5 ) v c k 1 , v c k 2 2 . 5 k w 2 . 5 k w v v d d i n p u t ( 6 ) v s t , d w n , e n 1 m w v v d d 2 5 0 w 2 5 0 w 2 5 0 w 2 5 0 w v c k 1 v c k 2 1 m w 1 m w 1 m w 1 m w 1 m w ( 7 ) p c g 2 5 0 w 2 5 0 w v v d d i n p u t 1 m w i n p u t l c ( 8 ) c o m 1 m w v v d d l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) l e v e l c o n v e r s i o n c i r c u i t ( 2 - p h a s e i n p u t ) l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) ? 5 LCX018AK input signals 1.input signal voltage conditions (vss = 0v) item h driver input voltage (hst, hck1, hck2, rgt, wid) (low) (high) (low) (high) vhil vhih vvil vvih vvc v com ?.30 2.7 ?.30 2.7 5.8 vvc ?0.4 0.0 3 0.0 3 6.0 vvc ?0.25 0.30 5.5 0.3 5.5 6.2 vvc ?0.1 v v v v v v v driver input voltage (vst, vck1, vck2, dwn, pcg, en) video signal center voltage common voltage of panel symbol min. typ. max. unit item video signal input range * 1 uniformity improvement signal psig input voltage video signal and uniformity improvement signal input white level vsig vpsig vsigl vvc ?4.0 vvc ?4.0 0.5 vvc + 4.0 vvc + 4.0 v v v symbol min. typ. max. unit (v dd = 12.0v) * 1 video input signal should be symmetrical to vvc. supplement) video signal and uniformity improvement signal input range are set within the range shown below for v dd and v ss . also, video signal white level is defined for vvc as shown below. a a a a a a a a a a a a a a a a a a a a a a a a a v s i g l w h i t e l e v e l v s i g l v i d e o s i g n a l i n p u t r a n g e m a x . v d d 1 . 8 [ v ] m i n . v s s + 1 . 3 [ v ] v d d v d d 1 . 8 v v c v d d + 1 . 3 v s s ? 6 LCX018AK 2. clock timing conditions (ta = 25 c) hst rise time hst fall time hst data set-up time hst data hold time hckn * 2 rise time hckn * 2 fall time hck1 fall to hck2 rise time hck1 rise to hck2 fall time vst rise time vst fall time vst data set-up time vst data hold time vckn * 2 rise time vckn * 2 fall time vck1 fall to vck2 rise time vck1 rise to vck2 fall time enb rise time enb fall time vck rise/fall to enb rise time enb pulse width pcg rise time pcg fall time pcg fall to vck rise/fall time pcg pulse width trhst tfhst tdhst thhst trhckn tfhckn to1hck to2hck trvst tfvst tdvst thvst trvckn tfvckn to1vck to2vck trenb tfenb tdenb twenb trpcg tfpcg tovck twpcg 35 80 ?5 ?5 ?.5 49 ?0 ?0 2150 5950 ?050 2450 45 90 0 0 4.5 59 0 0 2200 6000 ?000 2500 30 30 55 100 30 30 15 15 100 100 14.5 69 100 100 20 20 100 100 2250 6050 20 20 ?50 2550 ns s ns item symbol min. typ. max. unit hst hck vst vck enb pcg * 2 hckn and vckn mean hck1, hck2 and vck1, vck2. (fhckn = 3.72mhz, fvckn = 7.81khz) ? 7 LCX018AK ? 8 LCX018AK ? 9 LCX018AK electrical characteristics (ta = 25 c, hv dd = 13.5v, vv dd = 13.5v) 1. horizontal drivers item input pin capacitance hckn hst input pin current hck1 hck2 hst, wid, rgt video signal input pin capacitance current consumption chckn chst ihck1 ihck2 irgt csig ih hck1 = gnd hck2 = gnd hst, wid, rgt = gnd h ckn : h ck 1, h ck 2 (3.72mhz) ?50 ?00 ?30 8 8 ?90 ?00 ?5 150 3.5 13 13 200 6 pf pf a a a pf ma symbol min. typ. max. unit condition 2. vertical drivers item input pin capacitance vckn vst input pin current vck1 vck2 vst, en, dwn, pcg current consumption cvckn cvst ivck1 ivck2 ivst, ien iv ?50 ?00 ?30 8 8 ?90 ?00 ?5 1.0 13 13 2.0 pf pf a a a ma symbol min. typ. max. unit condition 3. total power consumption of the panel item total power consumption of the panel (ntsc) pwr 60 120 mw symbol min. typ. max. unit 4. com input resistance item com ?vss input resistance rcom 0.5 1 m symbol min. typ. max. unit 5. improvement signal for uniformity item improvement signal for uniformity cpsigon 7 10 nf symbol min. typ. max. unit vck1 = gnd vck2 = gnd vst, en, dwn, pcg = gnd v ckn : v ck 1, v ck 2 (7.87khz) ? 10 LCX018AK electro-optical characteristics (ta = 25 c, ntsc mode) item contrast ratio 25 c 60 c x y x y x y 25 c 60 c 25 c 60 c 25 c 60 c r vs. g b vs. g 0 c 25 c 0 c 25 c 60 c 60min. cr 25 cr 60 t rx ry gx gy bx by v 90-25 v 90-60 v 50-25 v 50-60 v 10-25 v 10-60 v 50rg v 50bg ton0 ton25 toff0 toff25 f yt60 vcomopt 80 80 3.8 0.580 0.300 0.250 0.550 0.105 0.070 1.1 1.0 1.5 1.4 2.2 2.1 5.60 200 200 4.4 0.620 0.340 0.290 0.590 0.140 0.110 1.5 1.3 2.0 1.8 2.7 2.5 ?.10 0.10 25 8 65 20 5.75 0.660 0.380 0.330 0.630 0.175 0.150 2.2 2.1 2.5 2.4 3.2 3.1 ?.25 0.45 100 40 150 60 ?0 20 5.90 1 2 3 4 5 6 7 8 9 % cie standards v v ms db s v optical transmittance chromaticity r g b v 90 v 50 v 10 on time off time v-t characteristics half tone color reproduction range response time flicker image retention time optimum vcom voltage symbol measurement method min. typ. max. unit ? 11 LCX018AK ? 12 LCX018AK 2. optical transmittance optical transmittance (t) is given by the following formula (2). t = 100 [%] ... (2) l (white) is the same expression as defined in the "contrast ratio" section. 3. chromaticity chromaticity of the panels are measured by system i . raster modes of each color are defined by the representations at the input signal amplitude conditions shown in the table below. system i uses chromaticity of x and y on the cie standards here. signal amplitudes (v ac ) supplied to each input r input g input b input r a s t e r r g b 0.5 4.5 4.5 4.5 0.5 4.5 4.5 4.5 0.5 (unit: v) 4. v-t characteristics v-t characteristics, the relationship between signal amplitude and the transmittance of the panels, are measured by system ii . v 90 , v 50 and v 10 correspond to the each voltage which defines 90%, 50% and 10% of transmittance respectively. 5. half tone color reproduction range half tone color reproduction range of the lcd panels is characterized by the differences between the v-t characteristics of r, g and b. the differences of these v-t characteristics are measured by system ii . system ii defines signal voltages of each r, g, b raster modes which correspond to 50% of transmittance, v 50r , v 50g and v 50b respectively. v 50rg and v 50bg , the voltage differences between v 50r and v 50g , v 50b and v 50g , are simply given by the following formula (3) and (4) respectively. v 50rg = v 50r ?v 50g ... (3) v 50bg = v 50b ?v 50g ... (4) 9 0 5 0 1 0 v 9 0 v 5 0 v 1 0 v a c s i g n a l a m p l i t u d e [ v ] t r a n s m i t t a n c e [ % ] 1 0 0 5 0 0 v 5 0 r v 5 0 b v 5 0 g v a c s i g n a l a m p l i t u d e [ v ] t r a n s m i t t a n c e [ % ] v 5 0 r g v 5 0 b g g r a s t e r b r a s t e r r r a s t e r l (white) luminance of back light ? 13 LCX018AK 6. response time response time t on and t off are defined by the formula (5) and (6) respectively. t on = t1 ?ton ... (5) t off = t2 ?toff ... (6) t1: time which gives 10% transmittance of the panel. t2: time which gives 90% transmittance of the panel. the relationships between t1, t2, ton and toff are shown in the right figure. 7. flicker flicker (f) is given by the formula (7). dc and ac (ntsc: 30hz, rms, pal: 25hz, rms) components of the panel output signal for gray raster * mode are measured by a dc voltmeter and a spectrum analyzer in system ii . ac component f [db] = 20 log { } ... (7) dc component 8. image retention time image retention time is given by the following procedures: apply monoscope signal to the lcd panel for 60 minutes and then change monoscope signal * to gray scale signal (vsig = 6 v ac (v); v ac = 3 to 4v) so as to give the maximum image retention. hold input signal v ac . the time of the residual image to disappear gives the image retention time. * monoscope signal conditions: vsig = 6 4.5 or 6 2.0 [v] (shown in the right figure) vcom = 5.6v i n p u t s i g n a l v o l t a g e ( w a v e f o r m a p p l i e d t o t h e m e a s u r e d p i x e l s ) 4 . 5 v 0 . 5 v 6 v 0 v l i g h t t r a n s m i s s i o n o u t p u t w a v e f o r m 1 0 0 % 9 0 % 1 0 % 0 % t o n t 1 t o n t o f f t 2 t o f f * r, g, b input signal condition for gray raster mode is given by vsig = 6 v 50 [v] where: v 50 is the signal amplitude which gives 50% of transmittance in v-t curve. b l a c k l e v e l w h i t e l e v e l v s i g w a v e f o r m 6 v 0 v 4 . 5 v 2 . 0 v 4 . 5 v 2 . 0 v ? 14 LCX018AK 9. method of measuring the optimum vcom there are two methods of measuring the optimum vcom using the photoelectric element. 9-1. method of measuring flicker in the field invert drive mode, adjust the flicker level of the half tone (vsig = 1.5 to 2.5v) using the photoelectric element and oscilloscope so that its 30hz component becomes minimum. the vcom value at this time is taken to be the optimum vcom. 9-2. method of measuring contrast in the normal 1h invert drive mode, adjust the optical output voltage of the half tone (vsig = 1.5 to 2.5v) so that it becomes minimum. the vcom value at this time is taken to be the optimum vcom. example of back light spectrum (reference) 0 . 6 0 . 4 0 . 2 0 3 8 0 4 8 0 5 8 0 6 8 0 7 8 0 w a v e l e n g t h 3 8 0 7 8 0 [ n m ] ? 15 LCX018AK description of operation 1. color coding the shaded area is used for the dark border around the display. LCX018AK dot arrangement (16:9) g a t e s w d l 1 g a t e s w d l 2 g a t e s w 1 g a t e s w 2 g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w 3 5 5 g a t e s w g a t e s w 3 5 6 g a t e s w 3 5 7 g a t e s w d r 1 g a t e s w d r 2 e v e n = 7 d o t s o d d = 8 d o t s e v e n = 1 0 8 3 d o t s o d d = 1 0 8 3 d o t s e v e n = 7 d o t s o d d = 7 d o t s 2 2 4 2 2 5 1 2 3 4 2 d o t s 2 2 5 d o t s ( e f f e c t i v e 8 . 7 7 5 m m ) 3 2 d o t s b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r e v e n = 1 0 6 9 d o t s o d d = 1 0 6 8 d o t s ( e f f e c t i v e 1 5 . 4 9 3 m m ) ? 16 LCX018AK LCX018AK dot arrangement (4:3) d l 1 d l 2 1 2 3 5 6 3 5 7 d r 1 d r 2 e v e n = 7 d o t s o d d = 7 d o t s 4 4 4 5 4 6 4 7 3 1 1 3 1 2 3 1 3 3 1 4 4 : 3 a r e a s i d e b l a c k s i d e b l a c k g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w 2 2 4 2 2 5 1 2 3 4 2 d o t s 2 2 5 d o t s ( e f f e c t i v e 8 . 7 7 5 m m ) 2 d o t s b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r r r r r r r r r r r r r r r r r r r b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b g b r g r r r r r r r r r r r r r r r r r r r e v e n = 1 3 3 d o t s o d d = 1 3 2 d o t s e v e n = 7 d o t s o d d = 8 d o t s r e v e n = 1 0 8 3 d o t s o d d = 1 0 8 3 d o t s e v e n = 8 0 3 d o t s o d d = 8 0 4 d o t s ( e f f e c t i v e 1 1 . 6 5 1 m m ) e v e n = 1 3 3 d o t s o d d = 1 3 2 d o t s ? 17 LCX018AK 2. lcd panel operations [description of basic operations] the basic operations of the lcd panel are shown below based on the wide-display mode. a vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse to every 225 gate lines sequentially in every single horizontal scanning period. a horizontal driver, which consists of horizontal shift registers, gates and cmos sample-and-hold circuit, applies selected pulses to every 1068.5 signal electrodes sequentially in a single horizontal scanning period. vertical and horizontal shift registers address one pixel, and then dot thin film transistors (tfts; two tfts for one dot) turn on to apply a video signal to the dot. the same procedures lead to the entire 480 1068.5 dots to display a picture in a single vertical scanning period. the lcd pixel dots are arranged in a delta pattern, where the dots connected to the identical signal line are positioned with 1.5-dot offset against those of the adjacent horizontal line. horizontal start pulse (hst) is generated with 1.5-bit offset between the horizontal lines to regulate the above offset. hck and sample-hold (s/h) pulses follow the same 1.5-bit offset scheme. the video signal must be input with polarity-inverted system in every horizontal cycle. timing diagrams of the vertical and the horizontal display cycle are shown below. v s t v c k 1 v c k 2 2 2 3 2 2 4 2 2 5 1 2 3 v e r t i c a l d i s p l a y c y c l e v d (2) horizontal display cycle (16:9) (1) vertical display cycle (down-direction scanning) h s t h c k 1 h c k 2 1 2 3 3 5 5 3 5 6 3 5 7 b l k h o r i z o n t a l d i s p l a y c y c l e (3) horizontal display cycle (4:3) h s t h c k 1 h c k 2 1 2 3 2 6 7 2 6 8 2 6 9 b l k h o r i z o n t a l d i s p l a y c y c l e ? 18 LCX018AK the direction of the right/left and/or up/down mean when pin 1 marking is located at right side with the pin block upside. the analog signal (psig) to display side-black shall be input by 1h inversion synchronized with the signal. 3. 3-dot simultaneous sampling (rgb simultaneous sampling) horizontal driver samples sig1, sig2 and sig3 signal simultaneously, which requires the phase matching between sig1, sig2, and sig3 signals to prevent horizontal resolution from deteriorating. thus phase matching between each signal is required using an external signal delaying circuit before applying video signal to the lcd panel. the block diagram of the delaying procedure using sample-and-hold method is as follows. the lcx018 has the right/left inverse function. the following phase relationship diagram indicates the phase setting for the right scan (rgt = high level). for the left scan (rgt = low level), the phase setting shall be inverted between sig2 and sig3 signals. < p h a s e r e l a t i o n s h i p o f d e l a y i n g s a m p l e - a n d - h o l d p u l s e s > ( r i g h t s c a n ) s / h s / h a c a m p s / h a c a m p s / h a c a m p s / h s i g 2 s i g 1 s i g 3 s i g 2 s i g 1 s i g 3 c k 2 c k 1 c k 3 c k 3 c k 3 h c k n c k 2 c k 1 c k 3 l c x 0 1 8 a k 4 3 5 [description of operating mode] the lcd panel has the following functions to easily apply to various uses, as well as various broadcasting systems. right/left inverse mode up/down inverse mode 4:3 display mode with side-black display these modes are controlled by three signals (rgt, dwn, and wid). the setting mode is shown below: wid h h l l h l h l 16:9 right scan 16:9 left scan 4:3 right scan 4:3 left scan rgt mode dwn h l down scan up scan mode ? 19 LCX018AK example of color filter spectrum (reference) 4 0 0 5 0 0 6 0 0 7 0 0 w a v e l e n g t h [ n m ] t r a n s m i t t a n c e [ % ] 0 2 0 4 0 6 0 8 0 1 0 0 b g r c o l o r f i l t e r s p e c t r u m ? 20 LCX018AK color display system block diagram l c d p a n e l n t / p a l / w i d l c x 0 1 8 a k r e d g r e e n b l u e p s i g c o m h s t h c k 1 h c k 2 v s t v c k 1 v c k 2 e n b p c g d w n w i d r g t c x a 2 5 4 3 r c o m p o s i t e v i d e o y / c y / c o l o r d i f f e r e n c e ( r e f e r t o c x a 2 5 4 3 r d a t a s h e e t . ) c o n t r o l c i r c u i t s e r i a l d a t a + 1 2 . 0 v + 4 . 5 v + 3 . 0 v + 1 3 . 5 v b u f f . ? 21 LCX018AK notes on handling (1) static charge prevention be sure to take following protective measures. tft-lcd panels are easily damaged by static charge. a) use non-chargeable gloves, or simply use bare hands. b) use an earth-band when handling. c) do not touch any electrodes of a panel. d) wear non-chargeable clothes and conductive shoes. e) install conductive mat on the working floor and working table. f) keep panels away from any charged materials. g) use ionized air to discharge the panels. (2) protection from dust and dirt a) operate in clean environment. b) when delivered, a surface of a panel (polarizer) is covered by a protective sheet. peel off the protective sheet carefully not to damage the panel. c) do not touch the surface of a panel. the surface is easily scratched. when cleaning, use a clean-room wiper with isopropyl alcohol. be careful not to leave stain on the surface. d) use ionized air to blow off dust at a panel. (3) other handling precautions a) do not twist or bend the flexible pc board especially at the connecting region because the board is easily deformed. b) do not drop a panel. c) do not twist or bend a panel or a panel frame. d) keep a panel away from heat source. e) do not dampen a panel with water or other solvents. f) avoid to store or to use a panel in high temperature or in high humidity, which results in panel damages. ? 22 LCX018AK package outline unit: mm a c t i v e a r e a o u t p u t l i g h t p o l a r i z i n g a x i s i n c i d e n t l i g h t i n c i d e n t l i g h t p o l a r i z i n g a x i s t h e r o t a t i o n a n g l e o f t h e a c t i v e a r e a r e l a t i v e t o h a n d v i s 1 . e l e c t r o d e ( e n l a r g e d ) 2 2 . 0 0 . 1 5 1 1 . 0 0 . 2 5 ( 1 5 . 5 ) 2 . 9 0 . 1 5 ( 8 . 8 ) 7 . 6 0 . 2 5 1 9 . 0 0 . 1 5 ( 4 0 . 2 ) 5 9 . 2 0 . 8 1 . 3 0 . 3 t h i c k n e s s o f t h e c o n n e c t o r 0 . 3 0 . 0 5 1 0 . 5 0 . 0 5 4 - r 1 . 0 1 4 3 5 6 p i n 1 p i n 2 0 0 . 5 0 . 1 p 0 . 5 0 . 0 2 1 9 = 9 . 5 0 . 0 3 0 . 5 0 . 1 5 3 . 0 0 . 3 0 . 3 5 + 0 . 0 4 0 . 0 3 w e i g h t 2 g 6 d e s c r i p t i o n m o l d i n g m a t e r i a l o u t s i d e f r a m e r e i n f o r c i n g b o a r d r e i n f o r c i n g m a t e r i a l p o l a r i z i n g f i l m f p c n o 1 2 3 4 5 6 2 |
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